Spectral Design & Test Inc Delivers Advanced Memory IP for IoT on 22nm Technologies

Spectral Design & Test Inc (SDT) has released six new Embedded Memory Compilers specifically tailored for IoT applications, which are designed to enhance performance while minimizing power consumption. The announcement, made on May 2, 2024, highlights the integration of state-of-the-art SRAMs crucial for data processing in battery-operated devices. SDT emphasizes its use of proprietary design to optimize SRAM architecture and improve energy efficiency without sacrificing yield and reliability.

SDT's collaboration with Silicon Labs on the 22nm process node aims to achieve optimal Power Performance Area (PPA) targets, catering to demanding IoT applications. This partnership reflects ongoing efforts to develop memory solutions that address the challenges of IoT devices in terms of high performance and low power usage. Moreover, Yiqun Lin, Senior Director at Silicon Labs, affirmed the strategic partnership’s role in advancing IoT technology that is both powerful and energy-efficient.

The newly launched Memory Compilers by SDT feature a sophisticated AI/ML-driven Graphical User Interface (GUI), enabling customers to tailor products to their specific PPA needs using the MemoryCanvas/MemoryTime suite. This suite ensures high-quality third-party views and undergoes extensive validation through the MemoryQA testing platform.